drm/amdgpu: add register definition for VCN RAS initialization
authorTao Zhou <tao.zhou1@amd.com>
Thu, 27 Oct 2022 09:50:56 +0000 (17:50 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 23 Nov 2022 15:31:31 +0000 (10:31 -0500)
commit88733d68014f06d4aae8ef0673ee31602ef1f0a7
treeb1b9367dc12a11757fd63e5703e8527794f8bc42
parent3c22c1ead6b2e6a9c0f2eeef143948f5d701dd08
drm/amdgpu: add register definition for VCN RAS initialization

Prepare for enableing VCN RAS poison.

v2: move SHIFT and MASK definitions to related sh_mask.h file.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h