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(parent: 89992d9) | patch
dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells
authorMarek Vasut <marex@denx.de>
Fri, 2 Dec 2022 16:23:49 +0000 (17:23 +0100)
committerDaniel Lezcano <daniel.lezcano@kernel.org>
Wed, 14 Dec 2022 14:25:40 +0000 (15:25 +0100)
commit8848c0d7a0782c263a7827697d5acfcc09a19a5f
treeb0c76460aefa2b05f53b0c3181c0b0d08d3769a4tree | snapshot
parent89992d95ed1046338c7866ef7bbe6de543a2af91commit | diff
dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells

The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values from OCOTP. Document optional phandle to OCOTP nvmem
provider.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml diff | blob | history
Domain: System / Kernel;