arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A
authorSean Anderson <sean.anderson@seco.com>
Fri, 22 Apr 2022 08:31:36 +0000 (14:01 +0530)
committerPriyanka Jain <priyanka.jain@nxp.com>
Tue, 26 Apr 2022 11:42:32 +0000 (17:12 +0530)
commit881284b36a3785328ac611bab4aedd9a2a8563e6
tree5f8c83df256ed437f7ac79e374bed97683562e57
parent9c18c695f820198c37aad812ce82e6a78195051e
arm: layerscape: Disable erratum A009007 on LS1021A, LS1043A, and LS1046A

This erratum is reported to cause problems on these processors [1-3].
The problem is usually with the clocking, which is supposed to be
configured by the RCW [4]. However, if it is not set, or if the default
clocking is not correct, then this erratum will cause an SError.
However, according to Ran Wang in [1]:
" ... this erratum is used to pass USB compliance test only, you could
 disable this workaround on your board if you don't any USB issue on
 normal use case, I think it's fine."

So just disable this erratum by default for these processors.

[1] https://lore.kernel.org/all/761ddd61-05c1-d9b8-ac90-b8f425afde6c@denx.de/
[2] https://community.nxp.com/t5/Layerscape/LS1046A-U-BOOT-HALT-AT-ERRATUM-A0090078/m-p/742993
[3] https://community.nxp.com/t5/QorIQ/Why-does-the-LS1043A-U-Boot-hang-at-code-that-fixes-erratum/m-p/644412
[4] https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb/usb_phy_freq.rcw

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/cpu/armv7/ls102xa/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/Kconfig