[AArch64][test] Replace -march with -mtriple for llc RUN lines
authorFangrui Song <i@maskray.me>
Wed, 1 Jun 2022 05:39:43 +0000 (22:39 -0700)
committerFangrui Song <i@maskray.me>
Wed, 1 Jun 2022 05:39:43 +0000 (22:39 -0700)
commit873d2aff426b484a7934c6b43a533a718d8bfbb1
tree8dd65ad64d7b65e9c8f57add9c8482d8816f11e5
parent726e2c5be556ef01a1f1ada76f87d56ad3c78bb2
[AArch64][test] Replace -march with -mtriple for llc RUN lines

-march is error-prone: -march inherits the OS and environment from the default
target triple. Use -mtriple which is more common.
57 files changed:
llvm/test/CodeGen/AArch64/GlobalISel/artifact-combine-unmerge.mir
llvm/test/CodeGen/AArch64/GlobalISel/combine-build-vector.mir
llvm/test/CodeGen/AArch64/GlobalISel/combine-copy.mir
llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
llvm/test/CodeGen/AArch64/GlobalISel/combine-insert-vec-elt.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
llvm/test/CodeGen/AArch64/GlobalISel/labels-are-not-dead.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-arith.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-fewerElts.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptrtoint.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-and.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fadd.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-or.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-xor.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-copy.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadd-sat.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-usub-sat.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir
llvm/test/CodeGen/AArch64/GlobalISel/non-pow-2-extload-combine.mir
llvm/test/CodeGen/AArch64/GlobalISel/retry-artifact-combine.mir
llvm/test/CodeGen/AArch64/machine-cp-clobbers.mir