Improving the SIMD codegen for SIMD12 load/store (#80083)
authorTanner Gooding <tagoo@outlook.com>
Fri, 6 Jan 2023 16:18:55 +0000 (08:18 -0800)
committerGitHub <noreply@github.com>
Fri, 6 Jan 2023 16:18:55 +0000 (08:18 -0800)
commit87312f7d6ff270519a4d13d31fbcaa99748654f8
treecae1351eb1fe50716df9aa3179356a8cff32664d
parent0bfa052862f565013f4286f151b0dac464c5dd9b
Improving the SIMD codegen for SIMD12 load/store (#80083)

* Improving the SIMD codegen for SIMD12 load/store

* Apply formatting patch

* Ensure the right index is used for insertps

* Ensure emitIns_SIMD_* is used for insertps to handle the non-rmw form

* Fix the input size flag for extractps

* Fix an issue where the second half of a TYP_SIMD12 store used the wrong register

* Ensure relocatable handles for TYP_SIMD12 load/stores are not contained

* Ensure arm32 can build
13 files changed:
src/coreclr/jit/codegen.h
src/coreclr/jit/codegenarm64.cpp
src/coreclr/jit/codegenarmarch.cpp
src/coreclr/jit/codegenlinear.cpp
src/coreclr/jit/codegenxarch.cpp
src/coreclr/jit/emitarm64.h
src/coreclr/jit/emitxarch.cpp
src/coreclr/jit/gentree.cpp
src/coreclr/jit/hwintrinsiclistxarch.h
src/coreclr/jit/instrsxarch.h
src/coreclr/jit/lowerxarch.cpp
src/coreclr/jit/lsraxarch.cpp
src/coreclr/jit/simdcodegenxarch.cpp