[PowerPC] Add some InstAlias definitions
authorKang Zhang <shkzhang@cn.ibm.com>
Sun, 24 May 2020 14:05:28 +0000 (14:05 +0000)
committerKang Zhang <shkzhang@cn.ibm.com>
Sun, 24 May 2020 14:05:28 +0000 (14:05 +0000)
commit86e3abc9e63e01675cb37919c55419f5c190d90e
treef8b0a4878904b8410ecc4555a0b9930503e49bce
parent4c5818dd8cd9336136a80a02b262b501b23f6492
[PowerPC] Add some InstAlias definitions

Summary:
This patch add the InstAlias definitions for below instructions.

ADDI ADDIS ADDI8 ADDIS8
RLWINM8
ISEL ISEL8
OR OR_rec ORI ORI8 XORI8
CNTLZW8 CNTLZW8_rec
TEND TSR
RFEBB
NOR NOR_rec
MTCRF
SUBF SUBF_rec SUBFC SUBFC_rec
RLDICL_32_64
TW

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D77559
67 files changed:
lld/test/ELF/ppc32-call-stub-pic.s
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrHTM.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
llvm/test/CodeGen/PowerPC/2009-09-18-carrybit.ll
llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
llvm/test/CodeGen/PowerPC/CompareEliminationSpillIssue.ll
llvm/test/CodeGen/PowerPC/atomics-regression.ll
llvm/test/CodeGen/PowerPC/crbits.ll
llvm/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
llvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll
llvm/test/CodeGen/PowerPC/expand-isel.ll
llvm/test/CodeGen/PowerPC/f128-compare.ll
llvm/test/CodeGen/PowerPC/fast-isel-binary.ll
llvm/test/CodeGen/PowerPC/fold-remove-li.ll
llvm/test/CodeGen/PowerPC/fold-zero.ll
llvm/test/CodeGen/PowerPC/funnel-shift.ll
llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
llvm/test/CodeGen/PowerPC/htm.ll
llvm/test/CodeGen/PowerPC/i1-ext-fold.ll
llvm/test/CodeGen/PowerPC/i64_fp_round.ll
llvm/test/CodeGen/PowerPC/ifcvt.ll
llvm/test/CodeGen/PowerPC/inc-of-add.ll
llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
llvm/test/CodeGen/PowerPC/machine-pre.ll
llvm/test/CodeGen/PowerPC/memcmp.ll
llvm/test/CodeGen/PowerPC/mul-const.ll
llvm/test/CodeGen/PowerPC/noPermuteFormasking.ll
llvm/test/CodeGen/PowerPC/optcmp.ll
llvm/test/CodeGen/PowerPC/optimize-andiso.ll
llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
llvm/test/CodeGen/PowerPC/popcnt-zext.ll
llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll
llvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
llvm/test/CodeGen/PowerPC/pr44183.ll
llvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
llvm/test/CodeGen/PowerPC/sat-add.ll
llvm/test/CodeGen/PowerPC/select_const.ll
llvm/test/CodeGen/PowerPC/setcc-logic.ll
llvm/test/CodeGen/PowerPC/shift128.ll
llvm/test/CodeGen/PowerPC/signbit-shift.ll
llvm/test/CodeGen/PowerPC/sms-cpy-1.ll
llvm/test/CodeGen/PowerPC/sms-phi-2.ll
llvm/test/CodeGen/PowerPC/spe.ll
llvm/test/CodeGen/PowerPC/srem-lkk.ll
llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
llvm/test/CodeGen/PowerPC/stack-guard-reassign.ll
llvm/test/CodeGen/PowerPC/stack-realign.ll
llvm/test/CodeGen/PowerPC/store-combine.ll
llvm/test/CodeGen/PowerPC/sub-of-not.ll
llvm/test/CodeGen/PowerPC/subc.ll
llvm/test/CodeGen/PowerPC/subreg-postra.ll
llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
llvm/test/CodeGen/PowerPC/urem-lkk.ll
llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
llvm/test/CodeGen/PowerPC/use-cr-result-of-dom-icmp-st.ll
llvm/test/CodeGen/PowerPC/vec-min-max.ll
llvm/test/CodeGen/PowerPC/vsx.ll
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8htm.txt
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
llvm/test/MC/PowerPC/htm.s
llvm/test/MC/PowerPC/ppc64-encoding.s
llvm/test/MC/PowerPC/ppc64-operands.s