cxl/mem: Prepare for early RCH dport component register setup
authorRobert Richter <rrichter@amd.com>
Thu, 22 Jun 2023 20:55:08 +0000 (15:55 -0500)
committerDan Williams <dan.j.williams@intel.com>
Sun, 25 Jun 2023 18:57:02 +0000 (11:57 -0700)
commit86917c560dcf29270093768d947387ca00f729b4
treef5dd62fe10216928b3a1ab466f51e4f0aed488de
parentf1d0525effc4fffe821905671ea24c30a4bfa393
cxl/mem: Prepare for early RCH dport component register setup

In order to move the RCH dport component register setup to cxl_pci the
base address must be stored in CXL device state (cxlds) for both
modes, RCH and VH. Store it in cxlds->component_reg_phys and use it
for endpoint creation.

Signed-off-by: Robert Richter <rrichter@amd.com>
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230622205523.85375-13-terry.bowman@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/mem.c