[RISCV] Fix alias printing for vmnot.m
authorCraig Topper <craig.topper@sifive.com>
Thu, 28 Apr 2022 15:20:42 +0000 (08:20 -0700)
committerCraig Topper <craig.topper@sifive.com>
Thu, 28 Apr 2022 15:33:52 +0000 (08:33 -0700)
commit8631a5e712a42ae9da240a851c9f598ffaa809b1
treeef30ebfd21f3d65d1868ad59920b399e41ce1c8e
parent2883de05145fc5b4afb99b91f69ebb835af36af5
[RISCV] Fix alias printing for vmnot.m

By clearing the HasDummyMask flag from mask register binary operations
and mask load/store.

HasDummyMask was causing an extra operand to get appended when
converting from MachineInstr to MCInst. This extra operand doesn't
appear in the assembly string so was mostly ignored, but it prevented
the alias instruction printing from working correctly.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D124424
14 files changed:
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll