clk: exynos5420: Set ID for aclk333 gate clock 03/76003/1
authorJavier Martinez Canillas <javier@osg.samsung.com>
Tue, 24 May 2016 17:41:01 +0000 (13:41 -0400)
committerMarek Szyprowski <m.szyprowski@samsung.com>
Wed, 22 Jun 2016 10:02:56 +0000 (12:02 +0200)
commit862f87de00a9695a00c2ed05d7a9c543323bba9c
tree50f35cdb739de7d72457d56c4c9a9be4e0f4069b
parent88a22c7bd4dfbeb120f147d9194013de46f0e5a9
clk: exynos5420: Set ID for aclk333 gate clock

The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[backport of mainline commit 34cba900375ec1751a87d3655ad03b9a5b022362]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I34cba900375ec1751a87d3655ad03b9a5b022362
drivers/clk/samsung/clk-exynos5420.c