ARM64: use regalloc-friendly COPY_TO_REGCLASS for bitcasts
authorTim Northover <tnorthover@apple.com>
Fri, 4 Apr 2014 09:03:09 +0000 (09:03 +0000)
committerTim Northover <tnorthover@apple.com>
Fri, 4 Apr 2014 09:03:09 +0000 (09:03 +0000)
commit85d6a16c46616336c52792e7a490e70ea8b6461e
tree39067bf3dc1f35b5d1d2ea97dace0a52c740e19f
parent1e4f2c5e5f20d9f57a00c0f99753a2d8a3acb0de
ARM64: use regalloc-friendly COPY_TO_REGCLASS for bitcasts

The previous patterns directly inserted FMOV or INS instructions into
the DAG for scalar_to_vector & bitconvert patterns. This is horribly
inefficient and can generated lots more GPR <-> FPR register traffic
than necessary.

It's much better to emit instructions the register allocator
understands so it can coalesce the copies when appropriate.

It led to at least one ISelLowering hack to avoid the problems, which
was incorrect for v1i64 (FPR64 has no dsub). It can now be removed
entirely.

This should also fix PR19331.

llvm-svn: 205616
llvm/lib/Target/ARM64/ARM64ISelLowering.cpp
llvm/lib/Target/ARM64/ARM64InstrInfo.td
llvm/test/CodeGen/ARM64/vaddv.ll