ARM: dts: at91: sama5d2: fix CAN message ram offset and size
authorNicolas Ferre <nicolas.ferre@microchip.com>
Thu, 3 Dec 2020 09:19:49 +0000 (10:19 +0100)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Thu, 3 Dec 2020 20:44:36 +0000 (21:44 +0100)
commit85b8350ae99d1300eb6dc072459246c2649a8e50
treef4a1de954740e5c0fb645ecf9a04a07acaed0725
parent9b5dcc8d427e2bcb84c49eb03ffefe11e7537a55
ARM: dts: at91: sama5d2: fix CAN message ram offset and size

CAN0 and CAN1 instances share the same message ram configured
at 0x210000 on sama5d2 Linux systems.
According to current configuration of CAN0, we need 0x1c00 bytes
so that the CAN1 don't overlap its message ram:
64 x RX FIFO0 elements => 64 x 72 bytes
32 x TXE (TX Event FIFO) elements => 32 x 8 bytes
32 x TXB (TX Buffer) elements => 32 x 72 bytes
So a total of 7168 bytes (0x1C00).

Fix offset to match this needed size.
Make the CAN0 message ram ioremap match exactly this size so that is
easily understandable.  Adapt CAN1 size accordingly.

Fixes: bc6d5d7666b7 ("ARM: dts: at91: sama5d2: add m_can nodes")
Reported-by: Dan Sneddon <dan.sneddon@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Cristian Birsan <cristian.birsan@microchip.com>
Cc: stable@vger.kernel.org # v4.13+
Link: https://lore.kernel.org/r/20201203091949.9015-1-nicolas.ferre@microchip.com
arch/arm/boot/dts/sama5d2.dtsi