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(parent: 2ef4e45) | patch
octeontx2-af: Initialize PTP_SEC_ROLLOVER register properly
authorNaveen Mamindlapalli <naveenm@marvell.com>
Sat, 10 Sep 2022 07:54:16 +0000 (13:24 +0530)
committerDavid S. Miller <davem@davemloft.net>
Sat, 17 Sep 2022 19:13:41 +0000 (20:13 +0100)
commit85a5f9638313a1df7e84e9ea66ecd216133215c2
tree20f8b43d78dc13bdc85ac9b8e43a2838f741fdd5tree | snapshot
parent2ef4e45d99b19fb16834616f47d21a9b76b0e5f4commit | diff
octeontx2-af: Initialize PTP_SEC_ROLLOVER register properly

Since the reset value of PTP_SEC_ROLLOVER is incorrect on
CNF10KB silicon, the ptp timestamps are inaccurate. This
patch initializes the PTP_SEC_ROLLOVER register properly
for the CNF10KB silicon.

Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/octeontx2/af/ptp.c diff | blob | history
Domain: System / Kernel;