perf/x86/uncore: Export basic memory events for IVT IMC PMU
authorStephane Eranian <eranian@google.com>
Tue, 12 Aug 2014 06:00:31 +0000 (08:00 +0200)
committerIngo Molnar <mingo@kernel.org>
Wed, 13 Aug 2014 05:51:17 +0000 (07:51 +0200)
commit85a16ef66cc8a053de80aadf13722a2c1254d346
tree16dbb8237348e44c30ac76f29d85b0d0a0620733
parentc8aab2e04ac9f442a07abeaf49ddd1703c608f47
perf/x86/uncore: Export basic memory events for IVT IMC PMU

This patch exposes two basic events for Ivytown IMC uncore PMU:

- cas_count_read: number of full-cache line reads to memory controller
- cas_count_write: number of full-cache line writes to memory controller

Those events use the same encoding as for SNB-EP, so reuse the same
event table. See specification in:

http://www.intel.com/content/dam/www/public/us/en/documents/manuals/xeon-e5-2600-v2-uncore-manual.pdf

By aggregating all the read and write events from all the memory controllers
of each processor socket, one can determine the total memory bandwidth utilization.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140812060031.GA25239@quad
Cc: zheng.z.yan@intel.com
Cc: ak@linux.intel.com
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel_uncore_snbep.c