[RISCV] Allow ABI Names in Inline Assembly Constraints
authorSam Elliott <selliott@lowrisc.org>
Thu, 8 Aug 2019 14:59:16 +0000 (14:59 +0000)
committerSam Elliott <selliott@lowrisc.org>
Thu, 8 Aug 2019 14:59:16 +0000 (14:59 +0000)
commit856d5c581783a31fea3099829099b0012e86ada7
tree0797f008bb0c22408615c49274a80d04eab2cb01
parent215360737941c4c13fcdcb87128752a19363f13d
[RISCV] Allow ABI Names in Inline Assembly Constraints

Summary:
Clang will replace references to registers using ABI names in inline
assembly constraints with references to architecture names, but other
frontends do not. LLVM uses the regular assembly parser to parse inline asm,
so inline assembly strings can contain references to registers using their
ABI names.

This patch adds support for parsing constraints using either the ABI name or
the architectural register name. This means we do not need to implement the
ABI name replacement code in every single frontend, especially those like
Rust which are a very thin shim on top of LLVM IR's inline asm, and that
constraints can more closely match the assembly strings they refer to.

Reviewers: asb, simoncook

Reviewed By: simoncook

Subscribers: hiraditya, rbar, johnrusso, JDevlieghere, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65947

llvm-svn: 368303
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/inline-asm-abi-names.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/inline-asm-d-abi-names.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
llvm/test/CodeGen/RISCV/inline-asm-f-abi-names.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll