RISC-V: Fix muti-line condition format
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Mon, 19 Dec 2022 23:09:35 +0000 (07:09 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Fri, 23 Dec 2022 05:40:56 +0000 (13:40 +0800)
commit85112fbbfd939f87fb12a00e40ab423ddcfa8ca1
tree8f9214ce9cb467993e9551b7abcb0c443b64e231
parent7e76cd96950f49ce21246d44780e972d86b2bcdd
RISC-V: Fix muti-line condition format

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line
conditional.
(vsetvl_insn_p): Ditto.
(same_bb_and_before_p): Ditto.
(same_bb_and_after_or_equal_p): Ditto.
gcc/config/riscv/riscv-vsetvl.cc