[X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressi...
authorAyman Musa <ayman.musa@intel.com>
Tue, 7 Mar 2017 08:11:19 +0000 (08:11 +0000)
committerAyman Musa <ayman.musa@intel.com>
Tue, 7 Mar 2017 08:11:19 +0000 (08:11 +0000)
commit850fc977c807984bcc583e1dede4b9113f1657c3
tree505434c15a722dc53875500f702e18af6c76eeae
parentac5a2c43af283fba87887de67f05c547c9fd1778
[X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressing tables.

X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible.
It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals.
This TableGen backend replaces the tables by automatically generating them.

Differential Revision: https://reviews.llvm.org/D30451

llvm-svn: 297127
llvm/cmake/modules/AddLLVM.cmake
llvm/docs/TableGen/BackEnds.rst
llvm/lib/Target/X86/CMakeLists.txt
llvm/lib/Target/X86/X86EvexToVex.cpp
llvm/lib/Target/X86/X86InstrTablesInfo.h [deleted file]
llvm/utils/TableGen/CMakeLists.txt
llvm/utils/TableGen/TableGen.cpp
llvm/utils/TableGen/TableGenBackends.h
llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp [new file with mode: 0644]