clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent
authorSjoerd Simons <sjoerd.simons@collabora.co.uk>
Tue, 22 Dec 2015 21:28:02 +0000 (22:28 +0100)
committerMichael Turquette <mturquette@baylibre.com>
Wed, 23 Dec 2015 20:57:30 +0000 (12:57 -0800)
commit84a8c541664b037a4d1fdc3151466b4ec45c37a5
tree9bdcbc15dc436daa5705d41291b6cbfa1eb4a30d
parent66746420898984a273ea08fa5926bd1640eaed3e
clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent

The clock branches leading to sclk_spdif and sclk_spdif_8ch on RK3288
SoCs only feed those clocks, allow those clocks to change their parents
all the way up the hierarchy.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
drivers/clk/rockchip/clk-rk3288.c