clk: Add Gemini SoC clock controller
authorLinus Walleij <linus.walleij@linaro.org>
Wed, 21 Jun 2017 07:59:52 +0000 (09:59 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 21 Jun 2017 17:45:54 +0000 (10:45 -0700)
commit846423f96721d5c1c2fad6b43b3f1359002907d5
tree97c6d36152e7ad88ddf357322d29ef8e4b1c8aea
parente293915a6edf3c57bd9f8101249221f5fc5f8bfe
clk: Add Gemini SoC clock controller

The Cortina Systems Gemini (SL3516/CS3516) has an on-chip clock
controller that derive all clocks from a single crystal, using some
documented and some undocumented PLLs, half dividers, counters and
gates. This is a best attempt to construct a clock driver for the
clocks so at least we can gate off unused hardware and driver the
PCI bus clock.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[sboyd@codeaurora.org: Fix devm_ioremap_resource() return value
checking]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/clk-gemini.c [new file with mode: 0644]