[RISCV] Reason explicitly about mask and rounding mode in performCombineVMergeAndVOps...
authorPhilip Reames <preames@rivosinc.com>
Thu, 13 Jul 2023 18:07:01 +0000 (11:07 -0700)
committerPhilip Reames <listmail@philipreames.com>
Thu, 13 Jul 2023 18:09:00 +0000 (11:09 -0700)
commit844fba2f84a4101c6966b2c7cb9c5ff4c69cd439
tree972bf19eb68f6fba36c576b10eb35f8357b88869
parente6724cbd8ae34909d524f6d303d88928975bb85d
[RISCV] Reason explicitly about mask and rounding mode in performCombineVMergeAndVOps [nfc]

This is a subset of Luke's D155063.  I'm splitting pieces and landing them in the process of convincing myself all the individual transforms are in fact correct.

The code structure here is overly verbose.  I'm landing this staging change with the code structure exactly matching the non-masked case to make the following cleanup that commons this all obviously correct.
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp