ARM: check predicate bits for thumb instructions
authorAmaury de la Vieuville <amaury.dlv@gmail.com>
Mon, 24 Jun 2013 09:15:01 +0000 (09:15 +0000)
committerAmaury de la Vieuville <amaury.dlv@gmail.com>
Mon, 24 Jun 2013 09:15:01 +0000 (09:15 +0000)
commit8449c0d5ed1e1a9b723329e42873b96e935b4e7c
tree6fbd3a867252c4db98ecad12c044f3cfc8afe0c7
parent8175bda3dbbadc3d5c831342dd817d62be926355
ARM: check predicate bits for thumb instructions

When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

llvm-svn: 184707
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/test/MC/Disassembler/ARM/invalid-NEON-thumb.txt [new file with mode: 0644]
llvm/test/MC/Disassembler/ARM/invalid-VFP-thumb.txt [new file with mode: 0644]