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[GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector support.
authorIgor Breger <igor.breger@intel.com>
Thu, 18 May 2017 11:10:56 +0000 (11:10 +0000)
committerIgor Breger <igor.breger@intel.com>
Thu, 18 May 2017 11:10:56 +0000 (11:10 +0000)
commit842b5b36ba18f8db4b0fe7be56d5251208f85fe3
treee6994902006cc43134622dec88a9069abae531b3tree | snapshot
parent8d81c2216454b54c1c7d7c0c2a2e074a4978be44commit | diff
[GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector support.

Summary: G_ADD/G_SUB vector legalizer/selector support.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33232

llvm-svn: 303345
17 files changed:
llvm/lib/Target/X86/X86LegalizerInfo.cpp diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/add-vec.ll [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-add-v128.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-add-v256.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-add-v512.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-sub-v128.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-sub-v256.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/regbankselect-AVX2.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/regbankselect-AVX512.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/select-add-v128.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/select-add-v256.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/select-add-v512.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/select-sub-v128.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/select-sub-v256.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/select-sub-v512.mir [new file with mode: 0644] blob
llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll [new file with mode: 0644] blob
Domain: System / Toolchain;