Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
authorCraig Topper <craig.topper@gmail.com>
Fri, 4 Apr 2014 05:16:06 +0000 (05:16 +0000)
committerCraig Topper <craig.topper@gmail.com>
Fri, 4 Apr 2014 05:16:06 +0000 (05:16 +0000)
commit840beec2d0855db9165c02bc29a79af8e357fc24
treecc21088e8d06f5c3158cd6fc7e00b483c9f0a817
parent79ed5d44e715537a933c399885dce58c7d877f73
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.

llvm-svn: 205610
63 files changed:
llvm/include/llvm/CodeGen/CallingConvLower.h
llvm/include/llvm/CodeGen/RegisterClassInfo.h
llvm/include/llvm/MC/MCRegisterInfo.h
llvm/include/llvm/Target/TargetLowering.h
llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/CodeGen/RegAllocPBQP.cpp
llvm/lib/CodeGen/RegisterScavenging.cpp
llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/lib/CodeGen/TargetRegisterInfo.cpp
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.h
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
llvm/lib/Target/ARM/ARMCallingConv.h
llvm/lib/Target/ARM/ARMFrameLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
llvm/lib/Target/ARM64/ARM64CallingConv.h
llvm/lib/Target/ARM64/ARM64FrameLowering.cpp
llvm/lib/Target/ARM64/ARM64ISelLowering.cpp
llvm/lib/Target/ARM64/ARM64ISelLowering.h
llvm/lib/Target/ARM64/ARM64RegisterInfo.cpp
llvm/lib/Target/ARM64/ARM64RegisterInfo.h
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
llvm/lib/Target/Hexagon/HexagonRegisterInfo.h
llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
llvm/lib/Target/MSP430/MSP430RegisterInfo.h
llvm/lib/Target/Mips/MipsFrameLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.h
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/lib/Target/Mips/MipsRegisterInfo.h
llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.h
llvm/lib/Target/R600/AMDGPURegisterInfo.cpp
llvm/lib/Target/R600/AMDGPURegisterInfo.h
llvm/lib/Target/Sparc/SparcISelLowering.cpp
llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
llvm/lib/Target/Sparc/SparcRegisterInfo.h
llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
llvm/lib/Target/X86/X86FastISel.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86RegisterInfo.cpp
llvm/lib/Target/X86/X86RegisterInfo.h
llvm/lib/Target/XCore/XCoreISelLowering.cpp
llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
llvm/lib/Target/XCore/XCoreRegisterInfo.h
llvm/utils/TableGen/CallingConvEmitter.cpp
llvm/utils/TableGen/RegisterInfoEmitter.cpp