drm/i915/rps: Freq caps for MTL
authorAshutosh Dixit <ashutosh.dixit@intel.com>
Sat, 10 Sep 2022 14:38:44 +0000 (07:38 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 16 Sep 2022 15:40:22 +0000 (11:40 -0400)
commit835a4d18353492577093eff7cb6fa866f6e7014f
treedbe00209dae6f1083d85fa7d813ffacf902f4c72
parent1551b9164f6194ffee78935d1ff515f697619483
drm/i915/rps: Freq caps for MTL

For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an
entirely different set of registers with different fields, bitwidths and
units.

v2: Move MTL check into a separate function (Jani)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220910143844.1755324-4-ashutosh.dixit@intel.com
drivers/gpu/drm/i915/gt/intel_rps.c
drivers/gpu/drm/i915/i915_reg.h