genirq: Add mechanism to multiplex a single HW IPI
authorAnup Patel <apatel@ventanamicro.com>
Tue, 3 Jan 2023 14:12:15 +0000 (19:42 +0530)
committerMarc Zyngier <maz@kernel.org>
Sun, 5 Feb 2023 10:57:55 +0000 (10:57 +0000)
commit835a486cd9f55790dee9f6b67ce0057d49f15da5
tree2c866ed0fa0584df029b17461dd33125d039791a
parent5dc4c995db9eb45f6373a956eb1f69460e69e6d4
genirq: Add mechanism to multiplex a single HW IPI

All RISC-V platforms have a single HW IPI provided by the INTC local
interrupt controller. The HW method to trigger INTC IPI can be through
external irqchip (e.g. RISC-V AIA), through platform specific device
(e.g. SiFive CLINT timer), or through firmware (e.g. SBI IPI call).

To support multiple IPIs on RISC-V, add a generic IPI multiplexing
mechanism which help us create multiple virtual IPIs using a single
HW IPI. This generic IPI multiplexing is inspired by the Apple AIC
irqchip driver and it is shared by various RISC-V irqchip drivers.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Hector Martin <marcan@marcan.st>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230103141221.772261-4-apatel@ventanamicro.com
include/linux/irq.h
kernel/irq/Kconfig
kernel/irq/Makefile
kernel/irq/ipi-mux.c [new file with mode: 0644]