ARM: dts: tegra20: paz00: Add memory timings
authorDmitry Osipenko <digetx@gmail.com>
Wed, 18 Dec 2019 18:59:57 +0000 (21:59 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 10 Jan 2020 14:41:54 +0000 (15:41 +0100)
commit834f1d6cf3647e804e7a80569e42ee7fbee50eb1
tree82ce14bb53a11c1acee25c378b7c7b42fd932f50
parentceffd1040ac0e3e661a6604bb018897c438fb340
ARM: dts: tegra20: paz00: Add memory timings

PAZ00 board has two variants of DDR2 SDRAM devices for External Memory:
one is Hynix HY5PS1G831CLFP-Y5 and the other is Micron MT47H128M8CF-25:H.
The Micron variant doesn't have official timings in the wild, hence only
timings for the Hynix are added. The memory frequency-scaling was tested
using the Tegra20 devfreq driver.

Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra20-paz00.dts