i965: batchbuffer: write correct canonical offset with softpin
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Tue, 17 Jul 2018 14:05:28 +0000 (15:05 +0100)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 18 Jul 2018 10:29:16 +0000 (11:29 +0100)
commit83427acc87730d2fab2eddffbb19fc9d85863407
tree2b1acbcd78163b3e10d67424902d0db4a93384ff
parent1376f2824fc300692f29adbbe6245dea1b06ebec
i965: batchbuffer: write correct canonical offset with softpin

Addresses in the command streams should be in canonical form (i.e
bit[63:48] == bit[47]). If the [bo->gtt_offset, bo->gtt_offset +
target_offset] range contains the address 0x800000000000, the current
code will fail that criteria.

v2: Fix missing include (Lionel)

Fixes: 1c9053d0765dc6 ("i965: Prepare batchbuffer module for softpin support.")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/intel_batchbuffer.c