[AArch64] Add the Ampere1B core (#81297)
authorPhilipp Tomsich <philipp.tomsich@vrull.eu>
Fri, 9 Feb 2024 23:22:09 +0000 (15:22 -0800)
committerTom Stellard <tstellar@redhat.com>
Tue, 27 Feb 2024 01:38:41 +0000 (17:38 -0800)
commit83283342c38e03fc501c84b9fad7cd62f1d629d3
tree7f39a3a924608a808b6065555086ca3dd37a20cc
parentb4b76bdbf1dab6199e4112781f37e96f1902bfcd
[AArch64] Add the Ampere1B core (#81297)

The Ampere1B is Ampere's third-generation core implementing a
superscalar, out-of-order microarchitecture with nested virtualization,
speculative side-channel mitigation and architectural support for
defense against ROP/JOP style software attacks.

Ampere1B is an ARMv8.7+ implementation, adding support for the FEAT
WFxT, FEAT CSSC, FEAT PAN3 and FEAT AFP extensions. It also includes all
features of the second-generation Ampere1A, such as the Memory Tagging
Extension and SM3/SM4 cryptography instructions.

(cherry picked from commit fbba818a78f591d89f25768ba31783714d526532)
14 files changed:
clang/test/Driver/aarch64-cssc.c
clang/test/Misc/target-invalid-cpu-note.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/TargetParser/Host.cpp
llvm/test/CodeGen/AArch64/cpus.ll
llvm/test/CodeGen/AArch64/neon-dot-product.ll
llvm/test/CodeGen/AArch64/remat.ll
llvm/test/MC/AArch64/armv8.2a-dotprod.s
llvm/test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt
llvm/unittests/TargetParser/Host.cpp
llvm/unittests/TargetParser/TargetParserTest.cpp