[AArch64] Support SLC in ACLE prefetch intrinsics
authorArchibald Elliott <archibald.elliott@arm.com>
Wed, 7 Dec 2022 10:04:30 +0000 (10:04 +0000)
committerArchibald Elliott <archibald.elliott@arm.com>
Fri, 16 Dec 2022 14:42:27 +0000 (14:42 +0000)
commit82b51a14280414a53413ed62c001d2c589c649c3
tree4f0a241f025d80eff06abdbb261267cf7dc19b10
parentf86cdb4853618603b8889dfeb932fd4ef8efd010
[AArch64] Support SLC in ACLE prefetch intrinsics

This change:
- Modifies the ACLE code to allow the new SLC value (3) for the prefetch
  target.

- Introduces a new intrinsic, @llvm.aarch64.prefetch which matches the
  PRFM family instructions much more closely, and can represent all
  values for the PRFM immediate.

  The target-independent @llvm.prefetch intrinsic does not have enough
  information for us to be able to lower to it from the ACLE intrinsics
  correctly.

- Lowers the acle calls to the new intrinsic on aarch64 (the ARM
  lowering is unchanged).

- Implements code generation for the new intrinsic in both SelectionDAG
  and GlobalISel. We specifically choose to continue to support lowering
  the target-independent @llvm.prefetch intrinsic so that other
  frontends can continue to use it.

Differential Revision: https://reviews.llvm.org/D139443
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/arm_acle.c
clang/test/CodeGen/builtins-arm64.c
clang/test/Sema/builtins-arm64.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/arm64-prefetch-new.ll [new file with mode: 0644]