drm/i915: Track pipe csc enable in crtc state
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 7 Feb 2019 20:21:42 +0000 (22:21 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 8 Feb 2019 12:29:39 +0000 (14:29 +0200)
commit8271b2ef71aaabac452dc03a6cbe8960cbea4247
tree2cf522d43f154bc33dfcf0ffa2073f8407e4ede1
parent5f29ab23046a4bb08a850e41bdb579b2cb59421d
drm/i915: Track pipe csc enable in crtc state

Just like we did for pipe gamma, let's also track the pipe csc
state. The hardware only exists on ILK+, and currently we always
enable it on hsw+ and never on any other platforms. Just like
with pipe gamma, the primary plane control register is used
for the readout on pre-SKL, and the pipe bottom color register
on SKL+.

v2: Rebase
v3: Allow fastboot with csc_enable changes (Maarten)
    Deal with HAS_GMCH

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207202146.26423-4-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_color.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_sprite.c