[X86][AVX512DQ] Improve lowering of MUL v2i64 and v4i64
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 27 Oct 2016 15:27:00 +0000 (15:27 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 27 Oct 2016 15:27:00 +0000 (15:27 +0000)
commit820e1326d726f8219b0de369f8dc14c666197c17
tree726505c42b9e22c99ffe2bd44eef3796a7ac61ec
parente372aecb8ac914133c960bd8ea5c52c5fdebe81d
[X86][AVX512DQ] Improve lowering of MUL v2i64 and v4i64

With DQI but without VLX, lower v2i64 and v4i64 MUL operations with v8i64 MUL (vpmullq).

Updated cost table accordingly.

Differential Revision: https://reviews.llvm.org/D26011

llvm-svn: 285304
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/arith.ll
llvm/test/CodeGen/X86/avx512-arith.ll