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RISC-V: Add RISC-V SBI PMU extension definitions
authorAtish Patra <atish.patra@wdc.com>
Thu, 24 Mar 2022 09:04:38 +0000 (17:04 +0800)
committerminda.chen <minda.chen@starfivetech.com>
Tue, 3 Jan 2023 06:26:17 +0000 (14:26 +0800)
commit81d8564c1fe8b70cf362f4d919cc83cdef8c6101
tree4bd41d1ffffcda7a09a1a843512ab23dbe6e5e78tree | snapshot
parent42b683064d64a6c52ad909af6aaf1bf01315d634commit | diff
RISC-V: Add RISC-V SBI PMU extension definitions

This patch adds all the definitions defined by the SBI PMU extension.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
arch/riscv/include/asm/sbi.h diff | blob | history
Domain: System / Kernel;