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(parent: 0e375f5) | patch
irqchip: Add Loongson HyperTransport Vector support
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Thu, 28 May 2020 15:27:49 +0000 (23:27 +0800)
committerMarc Zyngier <maz@kernel.org>
Fri, 29 May 2020 08:42:18 +0000 (09:42 +0100)
commit818e915fbac518e8c78e1877a0048d92d4965e5a
treef968276a5bf2203bffb46a5d351307aee5a3f630tree | snapshot
parent0e375f51017bcc86c23979118b10445c424ef5adcommit | diff
irqchip: Add Loongson HyperTransport Vector support

This controller appears on Loongson-3 chips for receiving interrupt
vectors from PCH's PIC and PCH's PCIe MSI interrupts.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200528152757.1028711-2-jiaxun.yang@flygoat.com
drivers/irqchip/Kconfig diff | blob | history
drivers/irqchip/Makefile diff | blob | history
drivers/irqchip/irq-loongson-htvec.c [new file with mode: 0644] blob
Domain: System / Kernel;