RISC-V: Add arch functions for non-retentive suspend entry/exit
authorAnup Patel <anup.patel@wdc.com>
Thu, 10 Feb 2022 05:49:42 +0000 (11:19 +0530)
committermason.huo <mason.huo@starfivetech.com>
Tue, 5 Jul 2022 05:40:17 +0000 (13:40 +0800)
commit817aedbfe9d955c89d4a158a221489291c083858
treedf9296efb0b92930ae073c48b71c37a24f8aa14b
parent8cc1bf87116a0f0427076adfca4164963f6fa936
RISC-V: Add arch functions for non-retentive suspend entry/exit

The hart registers and CSRs are not preserved in non-retentative
suspend state so we provide arch specific helper functions which
will save/restore hart context upon entry/exit to non-retentive
suspend state. These helper functions can be used by cpuidle
drivers for non-retentive suspend entry/exit.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
arch/riscv/include/asm/asm.h
arch/riscv/include/asm/suspend.h [new file with mode: 0644]
arch/riscv/kernel/Makefile
arch/riscv/kernel/asm-offsets.c
arch/riscv/kernel/head.S
arch/riscv/kernel/suspend.c [new file with mode: 0644]
arch/riscv/kernel/suspend_entry.S [new file with mode: 0644]