tradeonsi: fix preamble state producing incorrect packets
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Fri, 10 Jun 2022 08:44:39 +0000 (10:44 +0200)
committerMarge Bot <emma+marge@anholt.net>
Fri, 10 Jun 2022 17:40:18 +0000 (17:40 +0000)
commit813e60f1eada4af49a1755f83db7531ae598b15b
tree7999204bbf5dd648b8499e7ec667e4d1b638ebbf
parentdcdd31ae9646c51bdf9cdd4dbfd34d4d983b8eef
tradeonsi: fix preamble state producing incorrect packets

If the first time the preamble is written, one of the rings
isn't allocated, we wouldn't write the RING_SIZE to the preamble.

Later, when the preamble gets updated after the ring allocation,
the new RING_SIZE packet would overwrite other packets.

To prevent this, always write the RING_SIZE (the alternative would
be to write NOP packets).

This fix "*ERROR* Illegal register access in command stream" hangs
I observed on GFX8.

Fixes: 32c7805ccca ("radeonsi: merge all preamble states into one")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16962>
src/gallium/drivers/radeonsi/si_state_shaders.cpp