drm/i915: don't write powered down IRQ registers on Gen 8
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 4 Jul 2014 14:50:29 +0000 (11:50 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 23 Jul 2014 05:05:31 +0000 (07:05 +0200)
commit813bde438c575e2c84eed9702143d915702847e3
tree8ee9169b5570f4304be07a91343320f06b267350
parent480c80338618867851659710d1a27c9cc85833d2
drm/i915: don't write powered down IRQ registers on Gen 8

If we enable unclaimed register reporting on Gen 8, we will discover
that the IRQ registers for pipes B and C are also on the power well,
so writes to them when the power well is disabled result in unclaimed
register errors.

Also, hsw_power_well_post_enable() already takes care of re-enabling
them once the power well is enabled.

Testcase: igt/pm_rpm/rte
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_irq.c