ARM: dts: aspeed: Update e3c246d4i vuart properties
authorZev Weiss <zev@bewilderbeest.net>
Fri, 16 Apr 2021 07:51:13 +0000 (02:51 -0500)
committerJoel Stanley <joel@jms.id.au>
Thu, 1 Jul 2021 03:13:16 +0000 (12:43 +0930)
commit812bae32e5d50914f75a6e036d3bde39ca86b0c3
tree5944777b86b7c47aae0353b7d0f8246b4704ca00
parentca46ad2214473df1a6a9496be17156d65ba89b9f
ARM: dts: aspeed: Update e3c246d4i vuart properties

This device-tree was merged with a provisional vuart IRQ-polarity
property that was still under review and ended up taking a somewhat
different form.  This patch updates it to match the final form of the
new vuart properties, which additionally allow specifying the SIRQ
number and LPC address.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Fixes: ca03042f0f12 ("serial: 8250_aspeed_vuart: add aspeed, lpc-io-reg and aspeed, lpc-interrupts DT properties")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210416075113.18047-1-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts