drm/i915: Move CSC load back into .color_commit_arm() when PSR is enabled on skl/glk
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 20 Mar 2023 09:54:34 +0000 (11:54 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 21 Mar 2023 16:02:50 +0000 (18:02 +0200)
commit80a892a4c2428b65366721599fc5fe50eaed35fd
treeba2b47ab0c781abf67d5b928a8a9370e1b503e3c
parentf161eb01f50ab31f2084975b43bce54b7b671e17
drm/i915: Move CSC load back into .color_commit_arm() when PSR is enabled on skl/glk

SKL/GLK CSC unit suffers from a nasty issue where a CSC
coeff/offset register read or write between DC5 exit and
PSR exit will undo the CSC arming performed by DMC, and
then during PSR exit the hardware will latch zeroes into
the active CSC registers. This causes any plane going
through the CSC to output all black.

We can sidestep the issue by making sure the PSR exit has
already actually happened before we touch the CSC coeff/offset
registers. Easiest way to guarantee that is to just move the
CSC programming back into the .color_commir_arm() as we force
a PSR exit (and crucially wait for it to actually happen)
prior to touching the arming registers.

When PSR (and thus also DC states) are disabled we don't
have anything to worry about, so we can keep using the
more optional _noarm() hook for writing the CSC registers.

Cc: <stable@vger.kernel.org> #v5.19+
Cc: Manasi Navare <navaremanasi@google.com>
Cc: Drew Davenport <ddavenport@chromium.org>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8283
Fixes: d13dde449580 ("drm/i915: Split pipe+output CSC programming to noarm+arm pair")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230320095438.17328-3-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
drivers/gpu/drm/i915/display/intel_color.c