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[ARM] Reject CSEL instructions with invalid operands
authorMikhail Maltsev <mikhail.maltsev@arm.com>
Wed, 31 Jul 2019 14:22:45 +0000 (14:22 +0000)
committerMikhail Maltsev <mikhail.maltsev@arm.com>
Wed, 31 Jul 2019 14:22:45 +0000 (14:22 +0000)
commit806231ecc3964e01a439ecd4d6c38e2fa6b056d1
treee287ab42a36f7ebdd44d5cff5f6e8f781143b0fdtree | snapshot
parent64d7af09f53d125be4bb5af19b7f6389e3ef024ecommit | diff
[ARM] Reject CSEL instructions with invalid operands

Summary:
According to the Armv8.1-M manual CSEL, CSINC, CSINV and CSNEG are
"constrained unpredictable" when SP is used as the source register Rn.

The assembler should diagnose this case.

Reviewers: momchil.velikov, dmgreen, ostannard, simon_tatham, t.p.northover

Reviewed By: ostannard

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65505

llvm-svn: 367433
llvm/lib/Target/ARM/ARMInstrThumb2.td diff | blob | history
llvm/test/MC/ARM/thumbv8.1m.s diff | blob | history
llvm/test/MC/Disassembler/ARM/thumbv8.1m.s diff | blob | history
Domain: System / Toolchain;