[AArch64][GlobalISel] Make vector G_SEXT_INREG legal and allow combining.
authorAmara Emerson <amara@apple.com>
Tue, 4 Oct 2022 13:26:04 +0000 (14:26 +0100)
committerAmara Emerson <amara@apple.com>
Tue, 4 Oct 2022 23:28:08 +0000 (00:28 +0100)
commit8055aa8e8a7780124bbf1c7bea90c17018c12d01
treeeaac755c03cb8ac60a484fa1162a0e82be08152f
parent43fe6f7cc35ded691bbc2fa844086d321e705d46
[AArch64][GlobalISel] Make vector G_SEXT_INREG legal and allow combining.

As a result of making these legal, and tweaking the combine to allow vectors,
we generate vector G_SEXT_INREG during legalization.

The reason we want to make these legal in the first place is to allow for
more combine opportunities. Once those have been done, we can just lower them
back to shifts in the post-legalizer lowering.

This needs to be one commit otherwise we start causing tests to fail due to
incomplete support for selection etc.
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/lib/Target/AArch64/AArch64Combine.td
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sext.mir
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-sextinreg.mir [new file with mode: 0644]
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-ashr-shl-to-sext-inreg.mir