clk: mediatek: add UART0 clock support
authorHanks Chen <hanks.chen@mediatek.com>
Thu, 30 Jul 2020 13:30:16 +0000 (21:30 +0800)
committerStephen Boyd <sboyd@kernel.org>
Thu, 8 Oct 2020 21:45:16 +0000 (14:45 -0700)
commit804a892456b73604b7ecfb1b00a96a29f3d2aedf
tree9c6188449a40ded2933f726ba2e021b78f287fe0
parent9123e3a74ec7b934a4a099e98af6a61c2f80bbf5
clk: mediatek: add UART0 clock support

Add MT6779 UART0 clock support.

Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support")
Signed-off-by: Wendell Lin <wendell.lin@mediatek.com>
Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt6779.c