drm/i915/xehp: compute engine pipe_control
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Tue, 1 Mar 2022 23:15:40 +0000 (15:15 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 2 Mar 2022 14:45:18 +0000 (06:45 -0800)
commit803efd297e315859ac7830445699f01eeb1f7822
tree1db5bd97ef025ca36f6df9bd31be4f49ead95d08
parent505c4857fb13fb0ea88a42b843c91d0b9f8231fe
drm/i915/xehp: compute engine pipe_control

CCS will reuse the RCS functions for breadcrumb and flush emission.
However, CCS pipe_control has additional programming restrictions:
 - Command Streamer Stall Enable must be always set
 - Post Sync Operations must not be set to Write PS Depth Count
 - 3D-related bits must not be set

v2:
 - Drop unwanted blank line.  (Lucas)

Bspec: 47112
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220301231549.1817978-5-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/gen8_engine_cs.c
drivers/gpu/drm/i915/gt/intel_gpu_commands.h