arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE
authorVladimir Oltean <vladimir.oltean@nxp.com>
Sun, 23 Feb 2020 20:47:11 +0000 (22:47 +0200)
committerShawn Guo <shawnguo@kernel.org>
Wed, 11 Mar 2020 07:58:13 +0000 (15:58 +0800)
commit8023321d30be83cb9a9ef57376fa5a9c7c8bd887
treee3c9f9f71e6fa45dc936b4d962fae69f11b5ccef
parent80b06c5cae5487f590988fd296be36ecd97ede2a
arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE

This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.

Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.

The issue has no functional consequence so there is no real reason to
port the patch to stable trees.

Fixes: 927d7f857542 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi