[AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1 pattern
authoralex-t <alexander.timofeev@amd.com>
Thu, 23 Dec 2021 22:01:07 +0000 (01:01 +0300)
committeralex-t <alexander.timofeev@amd.com>
Fri, 24 Dec 2021 15:24:49 +0000 (18:24 +0300)
commit8020458c5dc2be841c07d26ff75b5471314e6631
tree4abaaabe69b0714d0b489eaf833751a429677b49
parent286237962ad35bc4756947c32310838ad4c76451
[AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1  pattern

In 'trunc' i16/32/64 to i1 pattern the 'and $src, 1' node supply operand to 'setcc'.
The latter is selected to S_CMP_EQ/V_CMP_EQ dependent on the divergence. In case the 'and' is scalar
and 'setcc' is divergent, we need VGPR to SGPR copy to adjust input operand for V_CMP_EQ.
This patch changes the S_AND_B32 to V_AND_B32_e64 in the 'trunc to i1' divergent patterns.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D116241
llvm/lib/Target/AMDGPU/SIInstructions.td
llvm/lib/Target/AMDGPU/VOPInstructions.td
llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll [new file with mode: 0644]