xtensa: increase ranges in ___invalidate_{i,d}cache_all
authorMax Filippov <jcmvbkbc@gmail.com>
Sat, 11 Aug 2018 05:21:22 +0000 (22:21 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 9 Sep 2018 18:01:23 +0000 (20:01 +0200)
commit7f2163b56e5eab5d63aa68084fecd63052389999
treedda9da37800b55454fd11a3f1198079fd06d9de8
parente996a24db2087ce1b3ad2e41fa2c2b05d1de8652
xtensa: increase ranges in ___invalidate_{i,d}cache_all

commit fec3259c9f747c039f90e99570540114c8d81a14 upstream.

Cache invalidation macros use cache line size to iterate over
invalidated cache lines, assuming that all cache ways are invalidated by
single instruction, but xtensa ISA recommends to not assume that for
future compatibility:
  In some implementations all ways at index Addry-1..z are invalidated
  regardless of the specified way, but for future compatibility this
  behavior should not be assumed.

Iterate over all cache ways in ___invalidate_icache_all and
___invalidate_dcache_all.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/xtensa/include/asm/cacheasm.h