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(parent: e996e20) | patch
drm/sun4i: dotclock: Allow divider = 127
authorChen-Yu Tsai <wens@csie.org>
Thu, 15 Sep 2016 15:14:01 +0000 (23:14 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Sun, 18 Sep 2016 19:13:35 +0000 (21:13 +0200)
commit7e81bda23ac3c79b6cf747c195810900b45a77fc
tree0de412eee606239efcb7bc4cf87087316a518851tree | snapshot
parente996e2089f25b84149ae82b5ddf37a263a7fcc71commit | diff
drm/sun4i: dotclock: Allow divider = 127

The dot clock divider is 7 bits wide, and the divider range is 1 ~ 127,
or 6 ~ 127 if phase offsets are used. The 0 register value also
represents a divider of 1 or bypass.

Make the end condition of the for loop inclusive of 127 in the
round_rate callback.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/gpu/drm/sun4i/sun4i_dotclock.c diff | blob | history
Domain: System / Kernel; Licenses: GPL-2.0;