[mlir][cuda] Add a test-lower-to-nvvm catchall passpipeline.
authorNicolas Vasilache <nicolasvasilache@users.noreply.github.com>
Sun, 16 Jul 2023 11:13:07 +0000 (13:13 +0200)
committerNicolas Vasilache <nicolasvasilache@users.noreply.github.com>
Mon, 17 Jul 2023 15:18:33 +0000 (15:18 +0000)
commit7e78ecfe10ea9071234de8d385b87d338d280266
tree0a8d3512af4db2163a3cfe7124b63730f9a2d845
parent28555793b1e58ee2e147ea62de42a9583fadbc5a
[mlir][cuda] Add a test-lower-to-nvvm catchall passpipeline.

This mirrors the test-lower-to-llvm pass pipeline that provides some sanity when running e2e examples.

One peculiarity of the GPU pipeline is that we want to allow 32b indexing in kernels.
This is currently not straightforward as there are dependencies between passes.
This new test pass orders passes in a way that connects end-to-end.

Differential Revision: https://reviews.llvm.org/D155463
mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
mlir/test/lib/Dialect/CMakeLists.txt
mlir/test/lib/Dialect/NVVM/CMakeLists.txt [new file with mode: 0644]
mlir/test/lib/Dialect/NVVM/TestLowerToNVVM.cpp [new file with mode: 0644]
mlir/tools/mlir-opt/CMakeLists.txt
mlir/tools/mlir-opt/mlir-opt.cpp