drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
authorSean Paul <seanpaul@chromium.org>
Tue, 7 Oct 2014 14:04:42 +0000 (16:04 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 13 Nov 2014 15:12:44 +0000 (16:12 +0100)
commit7e3bc3a98fd1df5839cdc5cbce4dfdb9e4c03655
tree5102e5b23e0b99e064e23a2ae1dced15bb6ecb25
parent030611ecc5d8b1daf8de110600c8771de45d398d
drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier

Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/tegra/dsi.c