author | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Tue, 10 Sep 2019 17:17:05 +0000 (17:17 +0000) | ||
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | |
Tue, 10 Sep 2019 17:17:05 +0000 (17:17 +0000) | ||
commit | 7df5b3fd26243a80d97382fdc09ce0374ab98d87 | |
tree | 5808271281dd53f87ee90033e5cc7e6b7913c2cf | tree | snapshot |
parent | 37d1bda4f6b59c38c35334a86fc8430343db7925 | commit | diff |
llvm/lib/Target/AMDGPU/AMDGPUGISel.td | diff | blob | history | |
llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | diff | blob | history | |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir | diff | blob | history |