[X86][Costmodel] Load/store i8 Stride=2 VF=2 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:41:46 +0000 (21:41 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Wed, 29 Sep 2021 18:52:44 +0000 (21:52 +0300)
commit7d52628eb0eba6cd27adf7f1b34dc3fb0d9b3a7e
treeb56dec7eb55dd1628b06fcee58e9ab8ed60105bd
parent8911fbeafe573be241150ea2a92662ab95c9ae12
[X86][Costmodel] Load/store i8 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/caKqjr9hb - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/6TTn3eKj8 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110702
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll