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[RISCV] Select (srl (and X, C2) as (slli (srliw X, C3), C3-C).
authorCraig Topper <craig.topper@sifive.com>
Wed, 29 Jun 2022 15:51:10 +0000 (08:51 -0700)
committerCraig Topper <craig.topper@sifive.com>
Wed, 29 Jun 2022 16:15:09 +0000 (09:15 -0700)
commit7cbfb4eb7a9e24ede4a59e9c08d91747d8475e03
tree81fdbde654170817ca44f6d3cf74bf6b26ff9a53tree | snapshot
parentffd6aaf5b6663836700663ae0f9a2d80f4056689commit | diff
[RISCV] Select (srl (and X, C2) as (slli (srliw X, C3), C3-C).

If C2 has 32 leading zeros and C3 trailing zeros.
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp diff | blob | history
llvm/test/CodeGen/RISCV/copysign-casts.ll diff | blob | history
llvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll diff | blob | history
Domain: System / Toolchain;